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Operational Amplifier (Op-Amp) Oscillator

circuit schematic

This is Operational an Amplifier (Op-Amp) Oscillator circuit. This circuit has some advantages, they are this circuit can be operated at low frequencies with relatively small capacitors, it has a completely-symmetrical output waveform along with a buffered output and it will always self start and cannot hang up because there is less dc positive feedback [...]



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4-Channel Commutator

circuit schematic

To reach low channel ON resistance (<30 Ohm) and low OFF current leakage, 4-channel commutator uses the 2N4091. The DM7800 voltage translator is a monolithic device. This device give us +10V to -20V gate drive to the JFETs while at the same time giving DTL-TTL logic compatibility.
Here’s the circuit diagram:

[Source: National Semiconductor Application Note]



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Low Pass Filter with Enhanced Step Response

circuit schematic

Effect on the system’s time-domain response is a common problem when designing lowpass filters. The system may fail to recognize significant changes in time because pushing the cuttoff frequency lower slows the step response. The circuit below is presented to solve the problem:

On this circuit diagram, lower cuttoff frequency is allowed without sacrificing [...]



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Stable Low Frequency Crystal Oscillator

circuit schematic

This is a Colpitts-crystal oscillator circuit. It is suitable for low frequency crystal oscillator circuits. Using the 2N3823 JFET, this circuit has excellent stability because the temperature will not vary the 2N3823 JFET circuit loading. Here is the circuit :

[Source: National Semiconductor Application Note]



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Low Distortion Oscillator

circuit schematic

With very low harmonic distortion, 2N4416 JFET is suitable to smoothly oscillate in a circuit. On application where low harmonic content is required for a good mixer circuit, JFET local oscillator is very good. Below is the circuit diagram of Low Distortion Oscillator:

And here’s the 20 MHz Oscillator Values

C1 = 700 pF L1 = [...]



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JFET Sample and Hold Circuit

circuit schematic

This is JFET sample and hold circuit. In this circuit, the logic voltage is applied simultaneously to the sample and hold JFETs. Here is the circuit :

The errors due to rds(on) of the JFETs can be minimized by matching feedback capacitance and resistance and input impedance. The circuit performance is greatly improved because of matched [...]



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