The circuit’s schematic diagram shown in the figure below is a flicker noise generator, an implementation of flicker noise analog modeling presented in NBS technical note #604, “Efficient Numerical and Analog Modeling of Flicker Noise Processes” by J.A. Barnes and Stephen Jarvis, Jr. With the component values shown the schematic diagram,  the circuit will give a 1/f noise slope from below 1Hz  to over 4KHz. A TLC2272 op-amp is used for this circuit, but any low noise op-amps will work. The op-amp must be a low noise type because the noise generation come from a high value resistor generating about 50nV noise. Use an op-amp with noise voltage less than 15 nV/root-Hz and noise current less than 0.1 pA/root-Hz, an easy-to-find feature in many low-noise modern op-amp devices. To simplify the construction, the capacitor values is slightly different from the calculated values described in the paper, and a bias circuit is provided to allow the use of polarized electrolytic capacitor. Because the electrolytic capacitor has poor tolerance, it should be chosen carefully for best performance.

Compared to circuit utilizing deode zener, reverse-biased transistor, or other noisy devices, this circuit give more predictable and repeatable output level.  If we tap the output of the first op-amp through a 100uF capacitor (like as seen in the second op-amp), a precise 5uV/root-Hz white noise will be there as an excellent signal source for audio noise measurement calibration. At the second op-amp, this white noise is filtered to give a flicker noise (pink noise) frequency speectrum, since the pink noise is a subset of white noise in the frequency domain. [Circuit's schematgic diagram source: techlib.com]



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