This is Fast Logarithmic Amplifier circuit. Dynamic range of This circuit has is 80 dB. This circuit is configured to optimize speed rather than dynamic range. To allow the use of feed forward compensation1 on an LM101A operational amplifier, this circuit uses Transistor Q1 that is connected with diode. This compensation can increase the slew rate and extends the bandwidth to 10 MHz. Here is the circuit:

Fast Logarithmic Amplifier circuit schematicThe bias current of the LM101A and The finite hFE of Q1 can cause errors. To prevent the errors, the base current and input current are buffered by an LM102 voltage follower. The accuracy will degrade at low input currents,  although the LM102 is not used in the log circuit. To achieve maximum bandwidth, Amplifier A2 is also compensated. R3 is used to control the zero crossing of the transfer function. The sensitivity is controlled by R1 and R2. [Source: National Semiconductor Application Note]