A fast peak detector similar but faster than previous peak detector, can be implemented using open loop configuration. Here is the schematic diagram of the circuit:

fast peak detector open loop circuit schematic

In this  design, D1 is the detector diode and D2 is a level shifting or compensating diode. A load resistor RL is connected to – 5V and an identical bias resistor, RB, is used to bias the compensating diode.  This  equal value resistors RL and RB make sure that the diode drops are equal. Low values of RB and RL (1k to 10k) yield in fast response, at the expense of poor low frequency accuracy. High values of RB and RL provide good low frequency accuracy but cause the amplifier to slew rate limit, resulting in poor high frequency accuracy. A solution can be made by adding a feedback capacitor  CFB, which improve the negative slew rate on the (–) input. We can expect under 15% amplitude error for 2Vpp-6Vpp input at 20MHz, much faster than closed loop design. [Schematic diagram source: Linear Technology Application Notes]